1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, a semiconductor device having a barrier layer between a ruthenium layer and a metal layer and a method for manufacturing the same.
2. Description of the Related Art
Semiconductor memory devices generally include a plurality of conducting layers and a plurality of dielectric layers between the plurality of conducting layers. Among the plurality of the conducting layers, operatively related conducting layers are connected to each other. Generally, a bonding layer and a barrier layer are formed between a lower conducting layer and an upper conducting layer to prevent deterioration by physical and electrical differences between conducting layers such as separation and diffusion of impurities. The bonding layer and the barrier layer are typically formed between a silicon substrate and a bit line contact plug (e.g., a tungsten plug), between a silicon substrate and a storage electrode contact plug (e.g., a tungsten plug), between the tungsten plug and an aluminum line for a bit line, between the tungsten plug and a polysilicon layer for a lower electrode of an MIS (Metal-Insulator-Silicon) capacitor, between the tungsten plug and a metal layer for a lower electrode of an MIM (Metal-Insulator-Metal) capacitor, or between a metal layer for an upper layer of a capacitor and a metal layer for wire such as aluminum.
Ti/TiN layers are used as the bonding layer and the barrier layer between a tungsten layer and a polysilicon layer and between a tungsten layer and an aluminum layer. If a wire layer is formed of copper, the bonding layer and the barrier layer are Ta/TaN instead of Ti/TiN.
The barrier layer can be formed by using one of a physical vapor deposition (PVD) process and a chemical vapor deposition (CVD) process. As semiconductor memory devices are more integrated, the CVD process is more preferably used for securing step coverage. However, if the bonding layer and the barrier layer are formed on a ruthenium layer, surface characteristics between the ruthenium layer and the bonding layer or the barrier layer are poor.
FIG. 1 is a flow chart of a conventional process for forming a barrier layer between a ruthenium layer and a metal layer. Referring to FIG. 1, a ruthenium layer is formed on a semiconductor substrate by using a CVD process in a CVD chamber [S1]. Next, TiCl4 (gas state) and NH3 gas are fed to the CVD chamber including the semiconductor substrate having the ruthenium layer, a barrier layer such as a TiN layer is formed by a following reaction [S2] at a temperature of about 600° C.:6TiCl4(g)+8NH3(g)→6TiN(s)+24HCl(g)+N2(g)And a metal layer for a wire on the barrier layer of TiN [S3] is formed.
However, with the CVD chamber being at a high temperature at or about 600° C., the TiCl4 (gas state) reacts with not only the NH3 gas, but also the ruthenium layer, thereby forming ruthenium halide such as RuCl3(g) or RuCl3*H2O salt. The ruthenium halide RuCl3(g) separates the ruthenium layer from the TiN layer by out-gassing and the RuCl3*H2O salt acts as an insulating material disposed between the ruthenium layer and the TiN layer, thereby deteriorating electrical conductivity characteristics between the ruthenium layer and the TiN layer.
FIG. 2 shows a scanning electron microphotograph (SEM) view of cross-section of a conventional structure having a barrier layer between a ruthenium layer and a metal layer. As shown in FIG. 2, the ruthenium layer is separated from the barrier of the TiN layer. It is generally caused by a halide containing matter such as TiCl4 for forming the TiN layer.
In semiconductor devices which are more highly integrated, a noble metal layer such as a ruthenium layer is used as an upper electrode of a capacitor. During forming the bonding layer/barrier layer such as with Ti/TiN or Ta/TaN on the ruthenium layer, ruthenium halide such as RuCl3(g) or RuCl3*H2O salt can be formed. Accordingly, a metal layer formed on the capacitor upper electrode is separated from the upper electrode or a ruthenium salt is generated between the capacitor upper electrode and the metal layer, thereby increasing leakage current of the capacitor and lowering capacitance.
Thus, notwithstanding these above-described methods of forming semiconductor capacitors, there still continues to be a need for improved method for semiconductor devices having a ruthenium layer and device for manufacturing the same.